1. Field of the Invention
The present invention relates to the field of semiconductor device fabrication and more particularly to improved methods for etching openings in oxide layers.
2. Background Information
In the fabrication of semiconductor devices, numerous conductive device regions and layers are formed in or on a semiconductor substrate. The conductive regions and layers of the device are isolated from one another by a dielectric, for example, silicon dioxide. The silicon dioxide may be grown, or may be deposited by physical deposition (e.g., sputtering) or by a variety of chemical deposition methods and chemistries. Additionally, the silicon dioxide may be undoped or may be doped, for example, with boron, phosphorus, or both, to form for example, borophosphosilicate glass (BPSG), and phosphosilicate glass (PSG). The method of forming the silicon dioxide layer and the doping of the silicon dioxide will depend upon various device and processing considerations. Herein, all such silicon dioxide layers are referred to generally as "oxide" layers.
At several stages during fabrication, it is necessary to make openings in the dielectric to allow for contact to underlying regions or layers. Generally, an opening through a dielectric exposing a diffusion region or an opening through a dielectric layer between polysilicon and the first metal layer is called a "contact opening", while an opening in other oxide layers such as an opening through an intermetal dielectric layer (ILD) is referred to as a "via". As used herein, an "opening" will be understood to refer to any type of opening through any type of oxide layer, regardless of the stage of processing, layer exposed, or function of the opening.
To form the openings, a patterning layer of photoresist is formed over the oxide layer having openings corresponding to the regions of the oxide where the oxide layer openings are to be formed. In most modern processes a dry etch is performed wherein the wafer is exposed to a plasma, formed in a flow of one or more gases. Typically, one or more halocarbons and/or one or more other halogenated compounds are used as the etchant gas. For example, CF.sub.4, CHF.sub.3 (Freon 23), SF.sub.6, NF.sub.3, and other gases may be used as the etchant gas. Additionally, gases such as O.sub.2, Ar, N.sub.2, and others may be added to the gas flow. The particular gas mixture used will depend on, for example, the characteristics of the oxide being etched, the stage of processing, the etch tool being used, and the desired etch characteristics such as, etch rate, wall slope, anisotropy, etc.
Various etch parameters such as the gas mixture, temperature, RF power, pressure, and gas flow rate, among others, may be varied to achieve the desired etch characteristics described above. However, there are invariably tradeoffs between the various desired characteristics. For example, most high performance etches exhibit aspect ratio dependent etch effects (ARDE effects). That is, the rate of oxide removal is dependent upon the aspect ratio of the opening, which can be defined as the ratio of the depth of the opening to the diameter. In general, the oxide etch rate, in terms of linear depth etched per unit time, is much greater for low aspect ratio openings than for high aspect ratio openings. Referring to FIG. 1, substrate 100 represents a semiconductor substrate and any device layers or structures underlying the oxide layer 101 through which the etch is to be performed. For example, there may be a silicon nitride layer (Si.sub.3 N.sub.4) underlying oxide layer 101. Herein, the term silicon nitride layer or nitride layer is used generally to refer to a layer of Si.sub.x N.sub.y, wherein the ratio x:y may or may not be stoichiometric, as well as to various silicon oxynitride films (Si.sub.x O.sub.y N.sub.z). As shown, patterning layer 110, which may be a photoresist layer, comprises openings 111 and 112. As can be seen, the diameter of opening 112 is much smaller than that of opening 111. Since the thickness of oxide layer 101 is the same under both openings, the oxide opening under photoresist opening 112 will have a much greater aspect ratio due to its small diameter. As a result of this, as shown in FIG. 1, the prior art etch process causes opening 121 through the oxide layer 101 to be fully etched prior to opening 122. In the prior art, this aspect ratio dependency may be overcome by adjusting the feed gas chemistry, adjusting the operating pressure, increasing the pumping speed to allow for high flow/low pressure operation, and the addition of diluent gases. However, in addition to the cost and time involved in the redesign of the process, these methods of minimizing the aspect ratio dependency typically result in a tradeoff between ARDE effects and other characteristics such as etch rate, selectivity, and profile control, for example. Recently, use of high density plasma (HDP) systems has been proposed to compensate for the ARDE effect. However, these HDP systems are not yet proven in a production mode, and they entail significant capital costs. It should be noted that more advanced technologies demand high etch performance in high aspect ratio features, and demand high etch performance in layers having features with a wide range of aspect ratios. Thus, the ARDE effect constitutes a significant hurdle in advanced applications.
Many of the etch characteristics are generally believed to be affected by polymer residues which deposit during the etch. For this reason, the fluorine to carbon ration (F/C) in the plasma is considered an important determinant in the etch. In general, a plasma with a high F/C ratio will have a faster etch rate than a plasma with a low F/C ratio. At very low ratios, (i.e., high carbon content) polymer deposition occurs and etching ceases. The etch rate as a function of the F/C ratio is typically different for different materials. This difference is used to create a selective etch, by attempting to use a gas mixture which puts the F/C ratio in the plasma at a value that leads to etching at a reasonable rate for one material, and that leads to no etching or polymer deposition for another. For a more thorough discussion of oxide etching, see S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era, Volume 1, pp 539-585 (1986).
By adjusting the feed gases, the taper of the sidewall of the oxide opening can be varied. If a low wall angle is desired, the chemistry is adjusted to try to cause some polymer buildup on the sidewall. Conversely, if a steep wall angle is desired, the chemistry is adjusted to try to prevent buildup on the sidewall. An important problem with changing the etch chemistry is that there is a tradeoff between wall angle and selectivity. That is, etches which provide a near 90.degree. wall angle are typically not highly selective between oxide and an underlying silicon or silicon nitride layer, for example, while highly selective etches typically have a low wall angle. FIG. 2 shows an oxide layer 201 formed on substrate 200, having patterning layer 210 with opening 211 therein. Opening 221 in the oxide layer 201 is shown during formation. In the etch illustrated in FIG. 2, high selectivity may be desired to protect an underlying region of, for example, silicon nitride on the upper surface of substrate 200. It also may be desired to obtain a relativity straight profile. However, if selectivity is to be maintained, the resulting opening 221 will have a taper as shown by angle 206. Often, in a prior art etch with acceptable selectivity, the angle 206 is less than 85.degree.. This tradeoff is particularly severe in etches through thick oxide layers. For example, if the process is engineered to allow for a steep wall profile through a thick BPSG layer, the selectivity will be very poor. While adjustments can be made to improve the wall angle, such as by changing etch chemistry, and other parameters, all processes will suffer from the selectivity tradeoff to some degree. Additionally, such changes will effect other performance goals. For example, as mentioned above, adjustment to the process parameters will have some effect on the ARDE effect. Furthermore, even if adjustments to the etch parameters are found which enhance selectivity without a severe impact on wall angle, such adjustments will involve other tradeoffs. For example, there is typically a tradeoff between selectivity and etch rate, so that increased selectivity may only be had at the expense of throughput. As can be seen, though some adjustments can be made, it is extremely difficult to design an oxide etch which meets all necessary goals. Additionally, it will be appreciated that while the general effects of certain process conditions are known, and the existence of certain tradeoffs can be predicted, it is far from a straightforward matter to precisely tailor an etch or precisely predict the effects changes in the parameters will have. Furthermore, it is often difficult to prevent other undesired consequences of polymer buildup.
FIG. 3 illustrates the effect of polymer buildup during a typical prior art etch process. Polymer buildup along the regions 307 along the sidewalls of opening 321 cause the wall profile to be different than a straight etch profile, shown dashed. Additionally, polymer buildup in the region 308 at the center of the bottom of the opening prevents etching of a portion of the nitride layer 302. However, etching does occur around the outer edges. Thus, the result of the prior art process is poorly controlled wall profile, and non-uniformity of the nitride layer 302 in the bottom of the opening 321. Again, changing the gas chemistry and other etch parameters may be used to improve the etch, but some tradeoffs are inevitable. Additionally, for example, attempts to improve the oxide :nitride selectivity often lead to non-stable plasma conditions, and involve high polymer chemistries, which in turn leads to dirty reactors requiring extensive maintenance, and particle generation which reduces yields.
The above described difficulties in oxide etching make it extremely difficult to form openings over corners of structures. Referring to FIG. 4, opening 411 in patterning layer 410 is aligned to partially overlie structure 404, which may be, for example, a gate, an interconnect line, or other structure. As shown, structure 404 is covered by silicon nitride etch stop layer 403. Typically, the opening 421 is designed to partially overlie structure 404 to a certain extent. Note that as the etch proceeds, opening 421 will extend to the corner of a gate 430 prior to the completion of the etch to the bottom of the opening at 432. As shown, due to the difficulty in achieving a highly selective etch, the nitride layer 403 is removed from structure 404 on the top 430 and side 431, which are exposed to the etch for a significant time before the etch reaches the bottom 432. This problem is particularly severe if the opening 411 is misaligned such that the opening in the oxide layer is formed as shown by dashed lines 421a. The opening 421a exposes a smaller area of nitride layer 403 than the opening 421. This leads to a reduction in the micro-loading effect, which in turn causes the now reduced area of nitride layer 403 to be etched at a much faster rate.
What is needed is a method or methods of etching oxide with reduced ARDE effect, which exhibit a high oxide to nitride selectivity, and which provide control of wall profile. Further, it is preferable that any such methods do not suffer from severe tradeoffs between and among these and other performance goals such as etch rate, so that highly selective etches with reduced sidewall taper and/or reduced ARDE effects, may be achieved. The method or methods should enable the formation of openings which lie on or over other structures, such as in a self-aligned contact etch. Finally, the method or methods should allow for increased opening depth, especially in process steps requiring the formation of deep openings of different depths, without an unacceptable sacrifice in performance. The method or methods should provide the above described etch characteristics without requiring extensive redesign of the process or process tools, unacceptable performance or process maintenance tradeoffs, costly and unproven equipment, or high particle generation.